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(parent: d751218) | patch
x86: Add TSC stop support for Deep C state
authorKeir Fraser <keir.fraser@citrix.com>
Thu, 1 May 2008 09:50:09 +0000 (10:50 +0100)
committerKeir Fraser <keir.fraser@citrix.com>
Thu, 1 May 2008 09:50:09 +0000 (10:50 +0100)
commitfe30f626cca32330175dbd68a3a072aa5bf358e8
treeb8dcf956d1b0865f9974d5db2011084cd928eecetree | snapshot
parentd751218ce10a8ec8f0e6d092fc823d59e7bc695fcommit | diff
x86: Add TSC stop support for Deep C state

TSC may stop at deep C state (C3/C4...) entry/exit. this patch add the
logic that save and restore TSC during deep C state entry/exit, by
using platform timer (PIT/HPET)

Signed-off-by: Yu Ke <ke.yu@intel.com>
Signed-off-by: Tian Kevin <kevin.tian@intel.com>
Signed-off-by: Wei Gang<gang.wei@intel.com>
xen/arch/x86/acpi/cpu_idle.c diff | blob | history
xen/arch/x86/time.c diff | blob | history
xen/include/xen/time.h diff | blob | history
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